- Develop Verilog for ultra-fast network applications in high-end FPGAs.
- Create supporting C++ code to interact with those FPGAs on Linux servers.
- Build Python code to stimulate and validate the Verilog FPGA design.
- Identify and resolve design timing issues to achieve timing closure.
- Integration test, benchmark, optimize, and support the company trading systems.
- Bachelor’s degree in Computer/Electrical Engineering or a related field.
- Familiarity with Verilog, C++, and Python is expected.
- Experience in applying your skill set through an internship and/or self-guided project is extremely beneficial.
- Excellent communication skills, both verbal and written.
- We hire for Aptitude, Character, and Enthusiasm. We are looking for associates who are eager to learn and move up as the firm grows.
- Base salary $50k to $100k, depending on position and experience.
- Bonus Pool. Incentive compensation can be highly rewarding. All associates are eligible to participate in our annual discretionary bonus pool. Bonuses are based on trading profits, individual performance and other criteria set by the board. Bonus payouts are not guaranteed.
- Benefits package available to all: including health insurance, paid time-off, IRA match, etc.
- Free lunch. The company provides lunch daily with rotating caterers.
- Tradebot Systems is a proprietary, algorithmic trading firm that specializes in U.S. equities. We are a registered broker-dealer and account for roughly 2 – 6% of all stock trading in America.
- We maintain our competitive advantage through cutting-edge technological innovation and analyzing “big data” to determine when we have a statistical edge.
- Our internally developed, low-latency trading system has been beating Wall Street since 1999. We have around 60 associates and they all work out of our headquarters in Kansas City.
Applicants should email their resume, including GPA and ACT score to firstname.lastname@example.org.
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